While multiprogramming and multithreaded workloads will easily take advantage of the extra processing power of these chip multiprocessors (CMPs), the real challenge is automatically parallelizing general-purpose applications (e.g., spreadsheets, web software, graphics codes, etc.) so that they may also benefit. One promising technique for overcoming this problem is Thread-Level Speculation (TLS) which, through novel hardware support, empowers the compiler to optimistically create parallel threads despite uncertainty as to whether those threads are actually independent.

In this talk I will describe our cost-effective approach to TLS support, which is differentiated by four goals: it handles arbitrary memory access patterns; it preserves the performance of non-speculative programs; it applies to any scale of multithreaded machine; and it makes full use of the compiler. I will demonstrate that our approach performs well on both chip-multiprocessors and on larger-scale machines that use chip-multiprocessors as building blocks.

Speaker Bio:

Greg Steffan is currently an Assistant Professor in the Electrical and Computer Engineering Department at the University of Toronto where he is pursuing his interests in computer architecture, compilers, and reconfigurable computing. While a Ph.D. student in the Computer Science Department at CMU, Greg was a member of the STAMPede project led by Todd Mowry. He received his B.A.Sc. and M.A.Sc. in Computer Engineering from the University of Toronto in 1995 and 1997 respectively, and has worked in the architecture group of MIPS Technologies Inc. and in the ALPHA development group of Compaq Computer Corporation.

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